SRAM Design Engineer

Company: Intel
Location: Cheyenne
Posted on: May 26, 2023

Job Description:

Job Description
About Advanced Design:
The Advanced Design organization delivers critical technology and design collaterals to enable future product designs. Ciritical to our mission, AD develops the 1st chips for all new Intel technology nodes. Intel prides to ensure process and design enablement are robust for high-volume product manufacturing.
The Group:
You will be part of Intel Advanced Design Organization (AD) within Design Enablement (DE) focused on pathfinding and development of advanced memory technology and circuits to enable best-in-class memory collateral/IP and product design across all generations of Intel process technology.
The Role:
You will be partnering with and leveraging domain experts across various areas of technology development, EDA vendors and product design teams to develop and deliver high-quality industry-leading memory technology collaterals and to drive circuit innovations that enable next generation high-performance, high-density, low-power embedded memory designs on Intel's advanced CMOS process technologies.
In this position your responsibilities will include, but may not be limited to:

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  Define, develop and optimize advanced memory bitcell, array construction, and periphery IC
  
  
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  Memory library development and validation for PDK enablement across Intel's advanced process technologies
  
  
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  Memory bitcell and complex peripheral IC layout and automation
  
  
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  Memory pathfinding activities and power, performance and area (PPA) optimization through design technology co-optimization (DTCO) and product design enablement
  
  
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  Memory array/IP design, memory circuit innovation, testchip design/execution/validation.
  
  
  Qualifications
  You must possess the below requirements to be initially considered for this position. Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork and/or classes and/or research and/or relevant previous job and/or internship experiences.
  Minimum:
  MS 3+ years or PhD in Electrical Engineering, Computer Engineering or related field.
  Experience in the following:
  
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    Knowledge of the CMOS ASIC design flow
    
    
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    Custom digital circuit design, simulation, layout design, and verification
    
    
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    Knowledge of EDA tools used for analog, digital and mixed-signal circuit design
    
    
    Preferred:
    
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      Experience with advanced CMOS process technology and device physics
      
      
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      Experience in design, characterization, and verification of custom memory circuits such as SRAM, Register Files, ROM, DRAM, MRAM, etc.
      
      
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      Experience in physical design optimization on custom circuits
      
      
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      Experience with design trade-off of power, performance, and area (PPA)
      
      
      Inside this Business Group
      As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth.
      Covid Statement
      Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.
      Posting Statement
      All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
      Benefits
      We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html
      Working Model
      This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Keywords: Intel, Cheyenne , SRAM Design Engineer, Engineering , Cheyenne, Wyoming